February 2019

A new AI consortium was announced that aims to deliver a vastly accelerated, power-saving AI platform and standard that enables new AI-rich capability for edge computing, gateways, cloud and data centers. The idea is to combine advanced acceleration hardware, resistive memory (RRAM) and optimized neural networks to create "ready-made, power-efficient solutions with unsupervised learning and event recognition capability".

The SCAiLE (SCalable AI for Learning at the Edge) consortium is already working with Japanese authorities to review opportunities for the 2020 Olympics, including video-based event detection and response capability. The consortium members include RRAM developer Crossbar and AI accelerator startup Gyrfalcon Technology, which recently announced the commercial availability of its LightSpeeur 2802M AI ASIC that include TSMC's eMRAM memory.

Israel-based SiOx RRAM developer Weebit Nano has signed an agreement to collaborate with the Technion Institute in Israel. Weebit will work together with a team of researchers to examine the possible use of ReRAM devices in processing-in-memory that could speed up processing, memory transfer rate and memory bandwidth and decrease processing latency – while using less power.

Weebit and the Technion will also perform characterisation and implementation of logic operations using Weebit’s RRAM test chips, demonstrating basic logic operations on a RRAM array